- From: Michael Welzl <
>
- To:
- Subject: What we need next
- Date: Wed, 31 Jan 2018 09:35:23 +0100
Hi,
First of all, can we agree to be all on Skype today? At least Francesco and
Angelo. I’m online now in Skype, with username mwelzl.
My phone number: Norwegian +47 47346201 (this is where I use WhatsApp),
Italian (ancient phone but cheaper to call :-) ): 3 756227384
I’ll mainly work until 4PM and MIGHT have to leave then, depending on the
state of things.
Looking at the current version of the paper, I think we need to do a few key
things next:
ALL STUDENTS:
- - - - - - - - - - - - -
From you, I think I need two or maybe three things:
1) the tables, in a compilable form:
To make this happen, I created a new main file called
"main-for-tables-only.tex” - with this you can try to get it to compile. I
am wondering: can we merge them into one table? Not only would this save
space, it would also be more convincing, I think, that this is indeed a
“complete” TCP implementation, and I could then make the text say “congestion
control is in lines X to Y”.
A question to Angelo: yesterday, you said something about not implementing
SACK and not implementing Spurious Loss Recovery - but that was just the SW
implementation, right? Are Spurious Loss Recovery and SACK parsing parts of
the tables? If not, why not - could we include them, or would that make the
tables much longer? (if we do skip them I need to explain why)
2) the time-sequence plot from Angelo:
Here, we’re almost there. Things overlap nicely between FPGA and SW, and
getting these to be 100% overlapping is almost impossible, a time-sequence
plot is REALLY a “zoom” into the TCP behavior, the tiniest timing derivations
may create the differences that we see now. So, in my opinion, seeing a small
difference is even better than a 100% overlap because it’s more credible! A
100% overlap might seem too magical! BUT, it is VERY important that we can
explain why lines are not 100% overlapping, so I need you to figure out why -
and I think the ns-3 version should really overlap one of the others as well,
else that’s just strange.
3) The SYN-Proxy use case:
It’s nice that we have text, but I think we need more. How did you agree to
show what you did, with an XFSM table? If so, please add this to the
tables.tex file - as a SEPARATE table. So I’m thinking of TWO tables in this
case: one for the whole XFSM, one for the SYN-Proxy.
FRANCESCO / ANGELO:
- - - - - - - - - - - - - - - - - - -
I think the SW part should be finished ASAP, both with text and plots (at
most 2 !). This, to me, is perhaps the biggest “hole” in the paper right now!
I’ll stay away from editing the SW file, "52-impl-sw.tex” - so Francesco,
this is completely in your hands now!
All other files, I’ll have a pass through and adjust a little (except that
we get updates in tables.tex, I hope!)
Cheers,
Michael
- What we need next, Michael Welzl
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